In recent years, upsizing of the television has been progressed and high image-quality video recording/playback devices using the DVD or the like have penetrated the market, whereby high image-quality video signals have been demanded. Accordingly, in the market, the share of video devices conforming to S-Video signals (luminance signals and chroma signals) is increasing for the purpose of preventing the degradation of signals due to separation of the signals into luminance signals and chroma signals.
Further, for recent video devices, an on-screen display (hereinafter, abbreviated as OSD) function of multiplex-displaying characters, control menus or the like on a screen is an essential function to improve the operability of complicated devices. Therefore, the OSD function is essential also to the video devices conforming to the S-Video signals.
Hereinafter, a prior art OSD device will be described with reference to figures.
FIG. 7 is a block diagram illustrating a structure of the prior art OSD device. Here, the description will be given of a case where S-Video signals from broadcast waves or a VCR tape are inputted to the OSD device as video sources.
In FIG. 7, a video processing circuit 61 receives a video signal inputted from a tuner 62 or a video signal recorded on a VCR tape 63, and outputs an S-Video signal.
The prior art OSD device 65 superimposes an OSD luminance signal and an OSD chroma signal upon a luminance signal and a chroma signal as the S-Video signal inputted from the video processing circuit 61, respectively, or generates all luminance signals and chroma signals by itself.
This prior art OSD device 65 comprises an OSD luminance signal generator 601 for generating an OSD luminance signal as a digital value;a DA converter 602 for converting the OSD luminance signal into an analog signal; a luminance signal output switch 603 that selects and outputs the output of the DA converter 602 in an OSD period, and selects and outputs the input luminance signal other than the OSD period; an OSD chroma signal generator 604 for generating an OSD chroma signal as a digital value; a DA converter 605 for converting the OSD chroma signal into an analog signal; and a chroma signal output switch 606 that selects and outputs the output of the DA converter 605 in the OSD period, and selects and outputs the input chroma signal other than the OSD period.
Next, the operation of the prior art OSD device will be described.
FIGS. 8(a) to 8(d) are diagrams for explaining a case where on-screen display (OSD) is performed on a luminance signal.
The description is given of a case where an OSD image is displayed along a horizontal dashed line in FIG. 8(a). In FIG. 8(a), input video other than the OSD image is not displayed while it is assumed that predetermined input video is displayed behind the OSD image.
FIG. 8(b) is a waveform diagram showing an input luminance signal. FIG. 8(c) is a waveform diagram showing an output luminance signal. FIG. 8(d) is a waveform diagram for explaining the operation of the luminance signal output switch 603.
During a period in which no OSD image is displayed on the screen, i.e., during a period other than the OSD period, the luminance signal output switch 603 selects the luminance signal input terminal side, and thus an input luminance signal is outputted as it is.
On the other hand, during a period in which the OSD image is displayed on the screen, i.e., during the OSD period, the luminance signal output switch 603 selects the DA converter 602 side, and thus an OSD luminance signal which has been generated by the OSD luminance signal generator 601 and converted into an analog signal by the DA converter 602 is outputted.
Therefore, the signal outputted from the luminance signal output switch 603 has a waveform shown in FIG. 8(c).
FIGS. 9(a) to 9(d) are diagram for explaining a case where black-and-white OSD is performed on a chroma signal.
Also in this case, the description is given of a case where an OSD image is displayed along a horizontal dashed line in FIG. 9(a), like in the case of the luminance signal. In FIG. 9(a), input video other than the OSD image is not displayed, but it is assumed that predetermined input video is displayed behind the OSD image.
FIG. 9(b) is a waveform diagram showing an input chroma signal. FIG. 9(c) is a waveform diagram showing an output chroma signal. FIG. 9(d) is a diagram for explaining an operation of the chroma signal output switch 606.
During a period other than the OSD period, the chroma signal output switch 606 selects the chroma signal input terminal side, and thus the input chroma signal is outputted as it is.
On the other hand, during the OSD period, the chroma signal output switch 606 selects the DA converter 605 side, and thus the OSD chroma signal which has been generated by the OSD chroma signal generator 604 and converted into an analog signal by the DA converter 605 is outputted.
Therefore, the signal outputted from the chroma signal output switch 606 has a waveform as shown in FIG. 9(c). During the black-and-white OSD period, AC components of the input chroma signal are not required and the outputted chroma signal is a DC voltage from the DA converter 605.
In the above descriptions with reference FIGS. 8 and 9, the case where the OSD luminance signal or chroma signal is superimposed upon an externally inputted luminance signal or chroma signal has been explained. However, there is a case where the OSD device 65 generates all luminance signals and chroma signals. In this case, the luminance signal output switch 603 and the chroma signal output switch 606 always select the DA converters 602 and 605 sides, and the video signals generated by the OSD luminance signal generator 601 and the OSD chroma signal generator 604 are outputted.
In the prior art OSD device, the DC level at a time when an input chroma signal is a null signal, i.e., when the input chroma signal includes no color burst signal and no color signal depends on the video processing circuit 61 shown in FIG. 7. On the other hand, the DC level in the OSD period is decided by the OSD device 65 shown in FIG. 7. When both of the supply voltages are different or when a voltage division circuit has variations, the potential is produced between the DC level when the input chroma signal is a null signal and the DC level when the OSD apparatus outputs a chroma signal. Accordingly, the prior art OSD device has following problems.
Hereinafter, the description will be given of a case where a chroma signal upon which an OSD image is superimposed is amplified.
FIG. 10 is a circuit diagram illustrating an example of an amplifier circuit. FIG. 11(a) is a waveform diagram showing a chroma signal inputted to the amplifier circuit. FIG. 11(b) is a waveform diagram showing a chroma signal outputted from the amplifier circuit.
The operation of the amplifier circuit shown in FIG. 10 will be described with reference to FIGS. 11(a) and 11(b).
In a period A˜B before the OSD period, the output chroma signal (FIG. 11(b)) has a waveform that is obtained by inverting the input chroma signal (FIG. 11(a)) along a voltage value VOB which is decided by resistors R1 to R4 in FIG. 10 and the like, and amplifying the inverted chroma signal.
At point B as the start point of the OSD period, the difference in level of the input signal (FIG. 11(a)) is inverted with respect to VOB and amplified, and thus the output chroma signal (FIG. 11(b)) has a waveform in the downward direction on the negative side. Until point C, the input chroma signal (FIG. 11(a)) does not vary, while the base of a transistor Tr in FIG. 10 has a higher voltage value than a voltage value decided by resistors R1 and R2, and the discharge current flows from a capacitor C to the resistors, so that the voltage value at the base decreases gently until it becomes the same voltage as the voltage value decided by the resistors R1 and R2. Thus, although there is no variation in the input chroma signal (FIG. (a)), the output chroma signal (FIG. 11(b)) varies gently from the negative value at the point B up to VOB at the point C.
In a period C˜D as the latter half of the OSD period, there is no variation in the input chroma signal (FIG. 11(a)) and thus there is no variation in the output chroma signal (FIG. 11(b)) either.
At the point D as the end of the OSD period, the input chroma signal (FIG. 11(a)) has an output difference of the OSD image, and the output chroma signal (FIG. 11(b)) has a positive value as the inverted and amplified value of the difference. Until point E, the base of the transistor Tr in FIG. 10 has a lower value than the voltage value decided by the resistors R1 and R2, then the charge current flows from the resistors to the capacitor C, and the amplifier circuit is in a state inverted from the state in the period B˜C. Accordingly, the voltage value at the base gently increases until it becomes the same voltage as the voltage value decided by the resistors R1 and R2. Further, since the input chroma signal (FIG. 11(a)) varies (because it has AC components), these variations are added, whereby the output chroma signal has such a waveform that the inverted and amplified AC components of the input chroma signal and the inverted and amplified output difference of the OSD image gently shift to VOB, as shown in FIG. 11(b).
During the last period E˜F, as in the period A˜B, the output chroma signal (FIG. 11(b)) has a waveform that is obtained by inverting the input chroma signal (FIG. (a)) with respect to VOB and amplifying the inverted chroma signal.
Display of the output chroma signal shown in FIG. 11(b) on the screen will be described.
The color is decided by hue and chroma and, generally, the hue is decided by a phase difference from the color burst signal and the chroma is decided by the amplitude ratio to the color burst signal.
In the period A˜B, according to the method for deciding the hue or chroma, by slicing the signal by VOB, the phase as a basis of color burst (for example 0°, 180°) is obtained and subsequently the phase difference at a point intersecting the same VOB can be obtained, thereby deciding the hue. Further, the amplitude ratio at the maximum amplitude with respect to VOB can be obtained, thereby also deciding the chroma. Thus, both of the hue and the chroma are decided and the color can be determined.
However, in the period B˜C immediately after the start of the OSD period, the phase difference cannot be obtained. Therefore, the erroneous display of the color occurs.
During the period C˜D, the amplitude ratio can be decided, whereby it can be determined that no color is included.
On the other hand, also in the period D˜E after the end of the OSD period, the phase difference with respect to VOB and the amplitude ratio cannot be obtained, whereby the color is erroneously displayed.
Then, in the period E˜F, the color can be displayed normally again.
As described above, during the OSD period and immediately after the OSD period, the color cannot be displayed normally.
The prior art OSD device can be constituted so as to prevent the above-mentioned problems.
FIG. 12 is a circuit diagram illustrating a structure of such a prior art OSD device. In FIG. 12, the structure of the prior art OSD device which performs OSD especially on a chroma signal will be described.
This prior art OSD device is constituted by a capacitor C1 placed on a chroma signal input side, an analog switch SW1 which is placed behind the capacitor C1 and works at high speeds, resistors R11, R12 and R13, and a transistor Tr1.
The resistors R11 and R12 are bias circuits and decide a bias point of the transistor Tr1 by dividing the supply voltage. The capacitor C1 is a coupling capacitor and plays a role of accommodating a divergence between the bias value of the input chroma signal and a bias generated in the prior art OSD device. Since the transistor Tr1 and the resistor R13 constitute an emitter-follower, the impedance is higher at the input and the impedance is lower at the output. In this prior art, the description is given of an emitter-follower, while of course a source-follower using a field-effect transistor or a follower circuit using an OP amplifier may be used.
Next, the operation of the prior art OSD device will be described.
The switch SW1 is closed during a period other than the OSD period. Therefore, the base of the transistor Tr1 has a voltage that is obtained by superimposing AC components of the input chroma signal upon the voltage divided by the resistors R11 and R12. Then, the output of the prior art OSD device shown in FIG. 12 has a voltage value which is reduced by the follower circuit that is constituted by the transistor Tr1 and the resistor R13, from the base voltage by a base-emitter voltage Vbe (about 0.7V) of the transistor Tr1. Therefore, the AC components of the input chroma signal are outputted in a state where there is no difference from the input, while the bias point shifts to a voltage value represented by the following Formula (1).((Supply voltage)×R12/(R11+R12))−0.7  Formula (1)
During the OSD period, the switch SW1 is open. Therefore, the AC components of the input chroma signal are not superimposed upon the output, and a voltage value which is reduced from the voltage that is decided by the resistors R11 and R12 by the base-emitter voltage Vbe of the transistor Tr1 is outputted.
As described above, whether in a period other than the OSD period or during the OSD period, both of the bias voltages have values represented by the above Formula (1), whereby the difference in the DC level (potential) due to the OSD is not produced.
However, assuming a case where the supply voltage includes many noises, the noises of the supply voltage enter the bias voltage due to the bias circuit that is constituted by the resistors R11 and R12. Further, the base of the transistor Tr1 has extremely high impedance and is easily affected by surrounding noises.
This presents quite a large problem particularly in the LSI in which logic circuits having supply voltages including many noises are mixed or the like. Further, the capacitor C1 as a coupling capacitor (normally about 1000 PF) is also required. Such a capacitor value cannot be contained in the LSI, whereby the number of external components is increased, resulting in an increased peripheral circuit scale. Furthermore, the bias voltage is decided by the resistors R11 and R12 and the capacitor C1 and then the LSI becomes a time-constant RC circuit, whereby the followability is not high at the variations of the input.